1. Field of the Invention
This invention relates to a filter device such as a digital filter device having a variable cutoff frequency. Also, this invention relates to a method of acquiring filter coefficients to be set in a filter device.
2. Description of the Related Art
It is known to use a digital signal processor (DSP) to form a filtering section of a digital filter device having a variable cutoff frequency. The filtering section of such a digital filter device contains a memory loaded with a signal of a set of filter coefficients. The actual cutoff frequency of the digital filter device is determined by the set of the filter coefficients.
A first known digital filter device includes a DSP-based filtering section having a variable cutoff frequency, and a ROM storing signals of sets of filter coefficients which correspond to different cutoff frequencies respectively. The ROM is accessed in response to an input command signal representative of a desired cutoff frequency so that a signal of a set of filter coefficients corresponding to the desired cutoff frequency will be read out from the ROM. The read-out signal of the filter coefficient set is written into a memory within the filtering section to equalize the actual cutoff frequency of the filtering section to the desired cutoff frequency. When many signals of sets of filter coefficients are required to be stored in the ROM, the capacity of the ROM needs to be great.
A second known digital filter device includes a DSP-based filtering section having a variable cutoff frequency, and a CPU programmed to calculate a set of filter coefficients. Specifically, the CPU calculates a set of filter coefficients from a desired cutoff frequency represented by an input command signal. The CPU writes a signal of the set of the calculated filter coefficients into a memory within the filtering section to equalize the actual cutoff frequency of the filtering section to the desired cutoff frequency. When accurate and fast calculation of filter coefficients is required, a high-grade expensive CPU is needed.
A background-art digital filter device which is not prior art to this invention includes a DSP-based filtering section having a variable cutoff frequency, a ROM storing signals of sets of first filter coefficients which correspond to different cutoff frequencies respectively, and a CPU programmed to calculate a set of second filter coefficients. The ROM is accessed in response to an input command signal representative of a desired cutoff frequency so that a signal of a set of first filter coefficients corresponding to the desired cutoff frequency will be read out from the ROM. The CPU receives the read-out signal of the set of the first filter coefficients. The CPU calculates a set of second filter coefficients from the set of the first filter coefficients. The CPU writes a signal of the set of the calculated second filter coefficients into a memory within the filtering section to equalize the actual cutoff frequency of the filtering section to the desired cutoff frequency. When many signals of sets of first filter coefficients are required to be stored in the ROM, the capacity of the ROM needs to be great. When accurate and fast calculation of second filter coefficients is required, a high-grade expensive CPU is needed.